Flip-flops are storage elements used for pipelining and storing the state of a circuit. They are fundamental building blocks for sequential logic and may be controlled by a clock signal. Clock signals may be cyclical and toggle up and down between high and low voltages each cycle. On each rising edge of the clock signal, the flip-flop may accept a new data input state and propagate it to the output. Unless the clock signal is gated, each flip-flop within a circuit may be exposed to the up and down toggling of the clock during each clock cycle. A flip-flop may have parasitic capacitance, that is, unwanted capacitance that is not intentionally designed into a circuit, but merely results as an inherent property of the circuit or sub-components within a circuit. Exposure to the toggling clock signal may cause the parasitic capacitance of a flip-flop to charge and discharge. The charging and discharging of the parasitic capacitance within a flip-flop may consume power, whether or not the input data has changed state from the previous clock cycle. Since flip-flops are the most commonly used sequential logic storage cell in integrated circuits, the power consumed due to parasitic capacitance may represent a large portion of the power consumption of an integrated circuit.